This invention relates to integrated circuit packages of the type in which multiple wires are bonded to an integrated circuit chip; and more particularly, it relates to methods of testing the wire bonds for defects in such packages.
Typically, the above type of integrated circuit package includes a ceramic body having a cavity to which the back surface of the integrated circuit chip is attached. Various circuitry such as bipolar or CMOS or NMOS logic circuitry is integrated into the front surface of the chip. In order to transmit electrical signals to and from the circuitry on the chip, a plurality of discrete wires are bonded between bonding pads of metal signal lines in the body of the package and the front surface of the chip.
One way in which these bonds are formed is by a thermocompression method. In this method, a bonding tool presses the wire against the bonding pad at an elevated temperature which is below the melting temperature of the wire. This causes the wire to laterally spread in the bonding area and there make intimate contact with the bonding pad which results in the bond.
Wire bonds are also formed by an ultrasonic bonding method. In this method, a bonding tool presses the wire against the bonding pad and simultaneously vibrates the wire at ultrasonic frequencies. These vibrations disrupt and disperse any oxides and other films between the wire and bonding pad and thereby bring the wire and bonding pad into intimate contact which forms the bond.
To determine the quality with which these bonds are fabricated, the bonds between every wire and pad on the chip, and between every wire and pad on the body of the package, must be tested. To that end, mil standard 833c specifies a nondestructive bond pull test, the purpose of which is to reveal nonacceptable wire bonds. In this test, an apparatus having a hookshaped member is utilized to hook onto and pull each bonded wire with a predetermined force which the wire should be able to withstand. For example, bonded aluminum wire having a diameter of 0.00125 inches should withstand a pull force of 2.5 grams.
Such a test procedure works well for SSI and MSI chips of the prior art. However, modern VLSI chips have a very large number of bonding wires, (e.g., over one hundred wires). Consequently, pulling on each of the bonding wires one at a time with a hook is very time-consuming. Further, as the number of bonding wires increases, the space between the bonding wires is forced to decrease. Bonding wires on modern VLSI chips can be spaced by only 0.006 inches. As a result, placing the hook of the testing apparatus around a single bonding wire without damaging or shorting some of the adjacent wires is very difficult and tedious.
Accordingly, a primary object of the invention is to provide an improved method for testing the wire bonds of an integrated circuit package which overcomes the above described problems.